Levan BabukhadiaLevan Babukhadia

Collaboration Meeting, September 13, 2001, Fermilab

Collaboration Meeting, September 13, 2001, Fermilab

http://www-d0.fnal.gov/~blevan/upgrade.html

L1CTT/PS Firmware Status

L1CTT/PS Firmware Status

SUNY at Stony BrookSUNY at Stony Brook

Collaboration Meeting, September 13, 2001, Fermilab Levan Babukhadia

After the October shutdown we must have

all DFE hardware and

all download infrastructure

in place; Otherwise we will NOT have the track/preshower trigger for some long time to come!

The Firmware group continues to concentrate on developing the VHDL code beyond the Occupancy Level only trigger firmware

I will concentrate on the CFT/CPSax firmware

Collaboration Meeting, September 13, 2001, Fermilab Levan Babukhadia

DFEA (80) : Jamieson

Occupancy Level firmware operational, tested with DataPump and AFEs

Track firmware done (4 FPGAs), MAX Pt design extensively tested with DataPump

New protocols nearly done Develop a software TestBench The L1 pipeline and the L2 output Backend (5-th) FPGA:

Rewrite the L1MUON track sorter with FIFOs instead of LIFOs

Add track isolation supportModify track/cluster matching engine

for single threshold CPS clusters Improve cluster finding (-bias)

Collaboration Meeting, September 13, 2001, Fermilab Levan Babukhadia

L1 CTOC (8) : Brian/Ricardo

Software TestBench in place Occupancy Level firmware operational,

extensively tested with TestBench and DataPump

Full CTOC firmware also in place, well tested with TestBench and DataPump except for the M/P and Cluster Counts.

New protocols done Synch studies with TestBench Add synchronization and L3 Sender via

L1FE and repeat TestBench and DataPump tests

Treatment of isolations, tau triggers, etc.

Collaboration Meeting, September 13, 2001, Fermilab Levan Babukhadia

CTTT (1) : Levan

Software TestBench in place Occupancy Level firmware with THT(3)

neoterms done and extensively tested with TestBench, including chaining CTTT with CTOC

Synchronization and L3 Sending implemented and tested in TestBench

New protocols done Add TTK(8)/TEL(4) neoterms next,

quadrant terms not very useful yet More extensive tests of synch and L3

Sending in TestBench Test & certify with DataPump Understand and test details of commu-

nications with TM Add the remaining neoterms

Collaboration Meeting, September 13, 2001, Fermilab Levan Babukhadia

L2 CTOC CFT (8) : Carsten

Software TestBench now in place, needs modifications for the L2

Started to test the design with limited number of TestVectors

Several modifications/improvements to VHDL code

New protocols done More extensive studies with TestBench

are needed Majority vote on turn/crossing number

(a la L1FE?); and event counter (?) Add L2 synchronization (hopefully not

very different from L1FE) Implement L2 L3 Sender Detecting a missing link (a la CTQD) L2 CTOC CPS: code exists and is

tested, will have to be revisited

Collaboration Meeting, September 13, 2001, Fermilab Levan Babukhadia

L2 CTQD CFT/CPS (4) : Steve

Both CFT and CPS designs are finished Software TestBench in place, needs

modifications for the L2 Designs tested in TestBench CFT design tested in DataPump with

limited number of TestVectors Detection of missing link implemented More extensive tests with TestBench

and DataPump are needed Review the L2 synchronization used Can not accept another event until

processing of a given event is done, and this should be Ok

Because of variable number of tracks, the L2 CTQD CPS data are by definition skewed by a lot as are the L2 CTOC CPS data; need to understand how to best deal with this issue…