¿Por qué debería preocuparme por ARM ?

1 | June 22, 2015 | © 2015 Curtiss-Wright

Defense Solutions Division

ARM® Single Board Computers

Gregory Sikkens, Senior Product Manager

2 | June 22, 2015 | Proprietary | © 2015 Curtiss-Wright

Why should I Care About ARM?

• Power constraints in military platforms:

• ARM offers a low power - reduced thermal solution in a low-weight processor

• Increasing budget pressures in the Aerospace and Defense industry:

• ARM’s low cost solution offsets increasing budget pressures

• Sensitive mission data requires a high level of security:

• ARM offers secure, high-integrity computing with ARM TrustZone® security technology

• Need for high performance computing in a small space:

• ARM is SWaP-optimized for aerospace and defense vehicles


A Closer Look: ARM Advantages

• Low power while maintaining good performance levels

• Low cost

• High integrity (ECC/Parity throughout including L1/L2 cache)

• Security features

• No Throttling

• Large and vibrant ecosystem

• True multi-vendor sourcing strategy

• Reviewed a number of sources that may suit A&D market

• Decided to focus on Freescale and AMD near term

• We have active relationships

• Strong track record of supporting A&D market

• White Papers on cwcdefense.com


ARM Holdings

• Creates and licenses IP, does not sell physical devices

• ARM holdings will provide architecture and tools

• Allows licensee to develop their own core based on hardware description and toolset from ARM

• ARM holdings will provide core

• Allows licensee to integrate ready to manufacture verified IP core by delivering gate net-list along with simulation and

test programs.

• Ex: ARMv7-A Architecture

• Cortex-A9 – Developed core by ARM

• Apple A6 – Developed core by Apple

5 | June 22, 2015 | Proprietary © 2015 Curtiss-Wright

So what does that mean?


ARM Partnership Model


ARM Decoder Ring

• ARMv5, ARMv6, ARMv7 ARMv8: ARM architecture versions

• ARM9, ARM11, Cortex-* : ARM processors

• ARM9 implements ARMv5

• ARM11 implements ARMv6

• Timeline

• 2005 – Cortex A8

• 2007 – Cortex A9

• 2009 – Cortex A5

• 2010 – Cortex A15

• 2011 – Cortex A7

• 2012 – Cortex A53/7

• 2013 – Cortex A12

• 2014 – Cortex A17

• 2015 – Cortex A72


ARM Cortex-A Roadmap


I know there are mobile and tablet use cases…

but what about general purpose embedded SBCs?


Processor Performance: ARM, Intel and Power Architecture

Freescale ARMLS1020

Freescale ARMLS1047A

AMD ARMHierofalcon

Intel BayTrailE3845 Intel IvyBridge

i7-3610QE 1-core

Intel IvyBridgei7-3610QE

Intel Haswelli7-4700EQ

1-core

Intel Haswelli7-4700EQ

Intel Broadwelli7-5850EQ

Intel Xeon D8 core

FS PA T1022*

FS PA T1042*

FS PA P2020

FS PA T2080*FS PA T2081*

FS PA P4080

FS PA P5020

0

50,000

100,000

150,000

200,000

250,000

0 5 10 15 20 25 30 35 40

Esti

mat

ed C

PU

DM

IPS

Maximum Processor Power (watts)

Processor DMIPS Performance .vs. Power (full range)

Intel

Power ArchitectureARM


Architecture Comparison: ARM, Intel and Power Architecture


Instruction Extension

• SIMD extension

• Neon (ARM) supports up to 16x 128-bit (ARMv7) • Cortex-A9 and earlier cores will only execute 64-bits at a time (AMBA limitation)

• Cortex-A15 and newer can execute 128-bits at a time

• ARMv7 NEON does not support double precision FP (ARMv8 will support double precision)

• Different cores will have different performance limitation • Cortex-A8: MRC instruction to pass data from NEON to ARM takes a minimum of 20 cycles

• Cortex-A9: Does not support the dual instruction load that was supported earlier

• AVX/SSE (Intel) Current i7s are 16x 256-bit. Moving to AVX-512 (512bit)

• Altivec (PPC) Supports up to 32x 128bit

• Vector Floating Point (VFP) – IEEE-754 Scalar (use NEON for vector) • Floating point hardware accelerator

• Shared register bank with NEON

• Support for double-precision floating point

• TrustZone


ARM Trust Zone

Physical Memory Isolation

TZASC (TrustZone Address Space

Controller)

• Monitors AXI bus to DDR controller

• Programmable address regions

Secure world access only

Shared access

• Programmed by Secure World

• Lockable

Peripheral Isolation

CSU (Central Security Unit)

• Monitors peripheral bus

• Programmable for each peripheral

Secure world access only

Shared access

• Programmed by Secure World

• Lockable per-peripheral


Single Board Computer - Operating Systems

INTEGRITY

653

PikeOS

WR Linux

Security

Cert.

Safety

Cert.


Technology Insertion

We continually invest in new products to ensure the longevity of your program

1257 1258 1259

1701 1705 1706

127 131 133

17xx

13x

12xx

We deliver pin-compatibility within and between product families

We design today for insertion tomorrow


3U ARM Architecture SBC Roadmap

2016 2015 2014

1701 1706

Processor XMC

1703

Freescale LS1020A Dual Cortex A7 Cores

2 GB, 1 GHz

1705

2017

Future

Customer Driven

In Design

Shipping

Roadmaps Subject to Change

Freescale LS1047A Four A72 Cores 1.6 GHz

4-8 GB SDRAM Two DVI outputs

Freescale LS1020A Dual Cortex A7 Cores 1 GHz

One bank SDRAM – 2 GB

AMD Hierofalcon Eight A57 Cores 2.2 GHz

4-16GB SDRAM

711

Freescale i.MX8 Video capture/graphics


Freescale LS1020A


Graphics System Configuration Example

XMC-270

Dual

DVI

Output

VPX3-1706

Dual

RS-170

Input

VPX3-1701/5

Dual

DVI

Output

XMC-715


SYSGO PikeOS Running SCADE Glass Cockpit Demo

• VPX3-1701

• Freescale LS1020A

• XMC-715

• AMD E4690


Q&A

Thank You

www.cwcdefense.com

Gregory Sikkens, Product Marketing Manager

Defense Solutions Division Curtiss-Wright T: 613.599.9199 x5449 | M: 613.899.4963 [email protected]


ARM Cortex A7

• The Cortex-A15 and Cortex-A7 cores represent the first generation of big.LITTLE hardware

• Both implement the full ARMv7A architecture including:

• Virtualization

• Large Physical Address Extensions

• The micro-architectures quite different

• The Cortex-A7 is an in-order, non-symmetric dual-issue processor with a pipeline length of between 8-stages and 10-stages

• The Cortex-A15 is an out-of-order sustained triple-issue processor with a pipeline length of between 15-stages and 24-

stages

Cortex-A7 delivers unmatched power/performance efficiency

• Dual core A7 higher performance and less power than A9


ARM Cortex A53/A57

• The Cortex-A57 and Cortex-A53 cores are the second generation of big.LITTLE hardware

• The Cortex-A57 is a big core similar to Cortex-A15

• 20% more performance per clock cycle

• higher frequency capability

• slightly higher efficiency than the Cortex-A15

• The Cortex-A53 is a LITTLE core similar to the Cortex-A7

• 25% more performance per clock cycle

• same power efficiency as Cortex-A7.

• Both these cores are architecturally identical

• introduce support for the ARMv8 architecture

• improved NEON and floating point capability

• cryptography acceleration

• 64-bit support


VPX3-1701 SBC

• Freescale™ LS1020 at 1.0 GHz (Dual ARM A7) • ECC protected L1/L2 caches

• Memory • Up to 2 GB DDR3 memory at 1 GHz

• 16 MB eMMC flash

• 512 KB non-volatile memory

• Communications and I/O • (2) 10/100/1000 Ethernet ports (1000-X compatible)

• (2) RS-232

• (2) RS-422

• Fabric Interconnect Ports • (2) x4 lane PCI Express® (PCIe) Gen2 (also configurable as (1) x8 lane)

• Pin Compatible with 131, 133 and 1257

• Operating Systems: • Linux ® (Kernel 3.12.0) • SYSGO PikeOS • Lynx Software Technologies – LynxOS 7.1

• Additional Features • Temperature sensor, RTC, DMA engine


VPX3-1701


VPX3-1705 SBC

• AMD Hierofalcon (Eight ARM Cortex A57) • 2.2 GHz • 4 MB L2 cache (1 MB/pair of A57) • 8 MB L3 cache • System Control Processor (SCP)

• ARM Cortex A5 with attached ROM, RAM

• System management functions - Control power, configure system etc

• Memory • 4-16 GB DDR3 memory at 1.866 GHz • 8-128 GB Flash SSD • 512 KB non-volatile memory

• Power • <50W

Concept

• Communications and I/O • (2) 10G Ethernet ports

• (1) RS-232

• (2) SATA 3.0

• Fabric Interconnect Ports • (1) x4 lane PCI Express® (PCIe) Gen 3

• Pin Compatible with 131, 133, 1257 and 1701

• Additional Features • Temperature sensor, RTC


VPX3-1705


VPX3-1706 SBC

• Freescale LS1047A (Quad ARM Cortex A72) • 1.6 GHz • 2 MB L2 cache (1MB/pair of A72) • Integrated platform security processor

• Memory • 2-8 GB DDR4 memory at 2.113 GHz • Up to 32 MB eMMC flash • 512 KB non-volatile memory

• Power • <30W

Concept

• Communications and I/O • (2) 10G Ethernet ports • (1) RS-232 • (1) RS-422 • (2) DVI • (2) USB 3.0 • (1) SATA 3.0

• Fabric Interconnect Ports • (2) x4 lane PCI Express® (PCIe) Gen2 (also configurable as (1) x8 lane)

• Pin Compatible with 131, 133, 1257 and 1701

• Additional Features • Temperature sensor, RTC, DMA engine


VPX3-1706


XMC-711

• Multi-core architecture for high performance, four Cortex-A9 800MHz cores, • 1MB L2 cache

• Delivers rich graphics and UI in HW

• OpenGL/ES 3D accelerator with OpenCL EP support and dedicated OpenVG 1.1 accelerator

• Offload engine – application runs on i.MX6 ARM processors (quad core)

• Backplane Fabric • One PCIe Gen2

Concept

• I/O and Communications • High quality video processing (resizing, de-interlacing, etc.) • Flexible dual display up to WUXGA (1920x1200) and HD1080

• DVI, RGB, STANAG-B • Flexible dual full streaming video capture

• Each can support one of RGB, STANAG-B, NTSC, PAL, RS-170 • Multi-format HD1080 video decode and encode • SATA 3 Gbps interface (SSD / HDD) • (1) GB Ethernet • (2) USB

• Additional Features • Freescale TrustZone technology • Freescale longevity of support (15+ years)

PCIe

XMC-711

Quad Core ARM

Triple Play Graphics

GigE USB S-ATA RS-232

Channel A: Analog In

Channel B: Analog In

Channel A: Analog Out

Channel B: Analog Out

Channel C: DVI/TMDS Out

Channel D: DVI/TMDS Out


XMC-711

Graphics

FPGA

Reset &

Power

DDR3

SDRAM

RS-232

USB

Gig-E

x32

x32

RGMII

Temp

Sense

I2C

Boot

eMMC

x1 PCIe

XMC-711 Block Diagram

SATA

i.MX6

Analog

Capture

Analog

Capture

LVDS

LVDS

HDMI

DVI TX

VDAC

VDAC

OP-AMP OP-AMP

Pn4 and Pn6 Connectors

TMDS/DVI TMDS/DVI RGB HV RGB HV

¿Por qué debería preocuparme por ARM ?

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