Introducción a microprocesadores VI

Memorias

Pin layout de un SRAM

Pins de datos

• Como la SRAM es una memoria de lectura/escritura, los pins de datos son usados para leer datos en el chip y ademas para escribir informacion hacia el microprocesador

• Con esto en mente, se le llamaran pins de entrada/salida (I/O).

Control pins• 1 Write enable (WE) controls internal tri-state buffers to control the• flow of data to write or read on the data pins. The line over the WE• indicates that, to write data, the pin must be held low.• 2 There are two chip selects, one shown as active low and one as• active high. To enable the chip, both must have the correct voltage• present. This provides a degree of flexibility to the system designer.• If either is not required, it can simply be held down permanently to• its appropriate voltage and then the other can then be used to• control the operation of the chip.

Pin layout of a DRAM• Row address strobe (RAS) and Column address strobe (CAS)• At first glance, there does not seem to be enough address pins for the• number of locations to be addressed. A0 to A9 is only 10 pins, which• would suggest a total of 210 or 1024 locations. The trick here is to use• the same pins twice and hence load in a total 220 or 1 048 576• addresses.• The sequence of events dictates that the RAS line is taken low and the• bottom half of the address is loaded into the Rows – RAS then returns• high. Then the CAS is taken low while the remainder of the address is• fed into the columns. After this, the state of the write line (same as R/W)• determines whether data is entering or leaving the DRAM.• There is only a single bit stored in each address, the data entering via• the data in (Din) pin and leaving via the data out (Dout) pin.

Some more memories that don’t fit into the general pattern

• SIMMs• Single in-line memory modules are a

collection of separate RAM chips• that are mounted on a piece of board to make

installation quicker and• easier. They are not actually a different type of

memory.

RAM Cards

• The problem with RAM memory is that it is volatile. The information

• is lost as soon as the system is switched off. RAM cards overcome this

• by providing the RAM chips with their own on-board battery. In this

• way, the RAM card can be removed from the system without losing the

• data. It is really a RAM pretending to be ROM. This provides full speed

• operation and permanence during the 10-year life of the battery.

Flash memory

• This is non-volatile RAM (NVRAM). In fact, it is really a form of RAM

• with a battery installed to provide power during shutdown periods.

• Rather like a single chip version of a RAM card.

Memory maps• A microprocessor has a number of address lines that can be used to• access RAM or ROM or other devices within the system. As we saw in• the memory chips, the total memory addressable by a microprocessor• is found by the formula 2n where n is the number of address lines. For• example, an 8-bit microprocessor generally has 16 address lines and• can access 216 or would have 65 536 or 64 bytes of memory. The• Digital Alpha 21064 has 34-bit address lines giving 234 or a little over• 17 Gbytes. This memory is shared between the RAMs, ROMs and• other devices, including some for the microprocessor itself to use.• The system designer has to decide in what way the available memory• is to be used. Using the memory map of the 8-bit microprocessor as a• simple example, we start off with a blank space as in Figure 6.21.• When the microprocessor is first supplied with power it will• immediately start following the first program provided. How does it

Mapeo de memoria

Mapeo de memoria

Mapeo de memoria• know what program is first? The answer to this is that it goes to a predetermined• address, which has been built into the microprocessor• during manufacture.• If we assume the startup address is FFFAH, then we must put some• useful information at that address for it to follow. This implies that• some ROM memory must be at the top end of the memory map. Most• provide some extra fast programming ability and this usually requires• that some RAM to be available at the bottom end of the memory• map.• There is nothing else that is allocated to any particular address so any• other RAM and ROM memories can be placed at any position on• the map. The map does not have to be full, indeed it seldom is. The• balance between RAM and ROM depends on the purpose to which the• system is to be put. A control system running a piece of manufacturing• machinery is likely to be predominately ROM whereas a computer• would need significant RAM. A simple memory map is shown in• Figure 6.22.

Acomodando la memoria• Sorting out the addresses• This is just an exercise in hex numbers in which a ‘hex’ calculator will• prove invaluable. Now, 1 kbyte of memory occupies 210 or 1024• locations, which is 400H in hex. The first section of RAM extends• from: start address + highest RAM address = 0000H to 03FFH so the• highest address in the ‘Fast instructions’ section is 03FFH. The User• RAM extends from 0400H to 3FFFH. How many kilobytes of memory• is this?• This is 15 kbytes of memory. This was found by subtracting 0400H• from 4000H to give 3C00H and then dividing this result by 400H, the• hex equivalent of 1 kbyte. The division is best done by calculator.• Remember that the fact that the user-RAM ended at 3FFFH means that• the total number of locations, including the first one in 4000H so it• was more convenient to use the figure of 4000H straight from the• memory map. This is sometimes a little difficult to fully come to terms• with, but a cup of coffee and a slump in an armchair often helps.• In a similar way, the video RAM that holds the information to be• displayed on a monitor can be found by subtracting the lower address• D800H from the higher address E000H to give 800H. Dividing by• 400H indicates 2 kbytes of video RAM.

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